Listing 1. VHDL Source Code 1 entity reading_dna is 2 Port ( led : out std_logic_vector(7 downto 0); 3 lcd_d : inout std_logic_vector(7 downto 0); 4 lcd_rs : out std_logic; 5 lcd_rw : out std_logic; 6 lcd_e : out std_logic; 7 j2_30 : out std_logic; 8 j2_26 : out std_logic; 9 j2_22 : out std_logic; 10 j2_14 : out std_logic; 11 clk : in std_logic); 12 end reading_dna; 13 -- 14 architecture Behavioral of reading_dna is 15 -- 16 17 -- start extra signals for LJ demo 18 signal lcd_e_copy : std_logic; 19 signal lcd_e_del_1 : std_logic; 20 signal lcd_e_del_2 : std_logic; 21 signal current_character : std_logic_vector(7 downto 0); 22 signal cnt_ops : integer range 0 to 49999999 := 0; 23 -- end extra signals for LJ demo 24 begin 25 26 device_dna: dna_port 27 port map( din => dna_din, 28 read => dna_read, 29 shift => dna_shift, 30 dout => dna_dout, 31 clk => dna_clk); 32 33 processor: kcpsm3 34 port map( address => address, 35 instruction => instruction, 36 port_id => port_id, 37 write_strobe => write_strobe, 38 out_port => out_port, 39 read_strobe => read_strobe, 40 in_port => in_port, 41 interrupt => interrupt, 42 interrupt_ack => interrupt_ack, 43 reset => kcpsm3_reset, 44 clk => clk); 45 46 program_rom: dna_ctrl 47 port map( address => address, 48 instruction => instruction, 49 clk => clk); 50 51 kcpsm3_reset <= '0'; 52 53 output_ports: process(clk) 54 begin 55 56 if clk'event and clk='1' then 57 if write_strobe='1' then 58 59 -- 8-bit LCD data output address 40 hex. 60 61 if port_id(6)='1' then 62 -- lcd_output_data <= out_port; 63 --extra code for LJ demo 64 if ((cnt_ops >= 8 and cnt_ops <= 17) or 65 (cnt_ops >= 19 and cnt_ops <= 32)) then 66 lcd_output_data <= current_character; 67 else 68 lcd_output_data <= out_port; 69 end if; --end extra code for LJ demo 70 end if; 71 72 end if; 73 74 end if; 75 76 end process output_ports; 77 78 -- LCD interface 79 80 cnt_and_new_chars: process(clk) 81 begin 82 if clk'event and clk='1' then 83 84 if port_id(5)='1' and write_strobe='1' then 85 lcd_e_copy <= out_port(0); 86 end if; 87 88 lcd_e_del_1 <= lcd_e_copy; 89 lcd_e_del_2 <= lcd_e_del_1; 90 91 if (lcd_e_copy ='1' and lcd_e_del_1='0') then -- posedge 92 if cnt_ops=49999999 then -- inc counter 93 cnt_ops <= 0; 94 else 95 cnt_ops <= cnt_ops + 1; 96 end if; -- if cnt_ops=49999999 97 end if; -- end (lcd_e_copy ='1' and lcd_e_del_1='0') 98 99 if (lcd_e_del_1 ='1' and lcd_e_del_2='0') then -- posedge 100 case cnt_ops is -- character generator 101 when 8 => current_character <= "01001101"; -- M 102 when 9 => current_character <= "00100000"; -- space 103 when 10 => current_character <= "01000110"; -- F 104 when 11 => current_character <= "01101001"; -- i 105 when 12 => current_character <= "01101111"; -- o 106 when 13 => current_character <= "01110010"; -- r 107 when 14 => current_character <= "01100101"; -- e 108 when 15 => current_character <= "01110100"; -- t 109 when 16 => current_character <= "01110100"; -- t 110 when 17 => current_character <= "01101001"; -- i 111 112 when 19 => current_character <= "01001100"; -- L 113 when 20 => current_character <= "01101001"; -- i 114 when 21 => current_character <= "01101110"; -- n 115 when 22 => current_character <= "01110101"; -- u 116 when 23 => current_character <= "01111000"; -- x 117 when 24 => current_character <= "00100000"; -- space 118 when 25 => current_character <= "01001010"; -- J 119 when 26 => current_character <= "01101111"; -- o 120 when 27 => current_character <= "01110101"; -- u 121 when 28 => current_character <= "01110010"; -- r 122 when 29 => current_character <= "01101110"; -- n 123 when 30 => current_character <= "01100001"; -- a 124 when 31 => current_character <= "01101100"; -- l 125 when 32 => current_character <= "00100000"; -- space 126 127 when others => current_character <= "00100000"; -- space 128 129 end case; 130 end if; -- end (lcd_e_del_1 ='1' and lcd_e_del_2='0') 131 132 133 end if; -- clk'event and clk='1' 134 end process cnt_and_new_chars;